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Chassis Power Architect Silicon

2 months ago

Doha, Baladīyat ad Dawḩah, Qatar Google Full time
Job Description

We are seeking a highly skilled Chassis Power Architect Silicon to join our team at Google.

Key Responsibilities:

  • Develop and implement power management strategies for our chassis-based systems.
  • Collaborate with cross-functional teams to design and optimize power delivery networks.
  • Design and analyze full chip power, with a focus on clock, reset, and power sequencing interactions.
  • Utilize Electronic Design Automation (EDA) tools to create and verify power management IP.
  • Work with engineers to integrate power management solutions into our products.

Requirements:

  • Master's degree or PhD in Electrical Engineering, Computer Engineering, or Computer Science.
  • Experience in post-silicon power calibrations and debug.
  • Experience in low power design, including UPF/CPF, multi-voltage domains, power gating, and on-chip power management IP design.
  • Proficiency in EDA tools, such as Conformal LP, Power-Artist, DC/RC, PT/PTPX, and Incisive/VCS.

What We Offer:

  • A dynamic and collaborative work environment.
  • Opportunities for professional growth and development.
  • A competitive salary and benefits package.